Our next #YUG will be with Matt Young, talking about triple modular redundancy. Join us at 18:00 CET / 22:30 IST / 09:00 PT on Thursday 9th October. Sign up to our mailing list to get a reminder before the event: blog.yosyshq.com/newsletter/

I will work on exploring applications of Aristotle to the formal verification of hardware. This job is a perfect intersection of hardware design and verification, functional programming, formal methods and machine learning, bringing together several threads of my career so far.

"High-Level Synthesis Synthesis" stefanabikaram.com/writing/hls-... Some fun writing on hardware design pedantry

[New Blog Post] Proving the Infinitude of Primes in Knuckledragger #python #logic www.philipzucker.com/knuckle_prim...

i built a pages server for Codeberg that's way cheaper to operate than the existing one, please enjoy grebedoc.dev/

I got inspired at orconf, so now play.spade-lang.org supports a full in-browser flow for submitting to tinytapeout.com/ Still experimental, so if you try it and run into any issues, let me know :)

A lovely Xilinx 7-series FPGA chip layout of a sorting network produced from a dependently typed DSL in Haskell. More stuff like this during my keynote talk at ICFP 2025 in October in Singapore. icfp25.sigplan.org/details/icfp...

I did some more hacking to produce a totally floorplanned 64-input sorter circuit on a Xilinx XC7A200T FPGA, on the LHS picture shown as a tight rectangular block, on the RHS a close-up that shows the butterfly wiring pattern.

Check out the fantastic open source hardware hacker content from this weekend’s ORCONF’25! fossi-foundation.org/orconf/2025?... HT/thanks @mattvenn.net

Shout out to all the CGRA folks, all jokes are in good fun

new preprint, tl;dr: • LLMs match or exceed SOTA strategies on chemical reaction optimizations. • we built the Iron Mind platform and we hope that it can serve as a new benchmark for both reaction optimizers and foundation models. a thread [1/5]

Lindsey Kuper's* group has produced this fantastic zine on choreographic programming that folks should definitely check out: decomposition.al/blog/2024/12... (* can't seem to find Lindsey here but please tag if you know the handle)

Today at ASPLOS Chengsong Tan will present our work with @wicko3.bsky.social on mechanical formalisation of CXL.cache - check out the paper! www.doc.ic.ac.uk/~afd/papers/... #CXL

This study of deep learning optimizers found that previously claimed speedups of alternative optimizers over AdamW in language model pretraining were often inflated due to methodological shortcomings like unequal hyperparameter tuning and limited evaluation.

Benchmarking the variety of different proposed LLM optimizers: Muon, AdEMAMix, ... all in the same setting, tuned, with varying model size, batch size, and training duration! They find that AdEMAMix is SOTA, the importance of weight decay, or how Muon “prefers” WSD, and more...

Paper: Benchmarking Optimizers for Large Language Model Pretraining ( arxiv.org/abs/2509.01440 ) Repo: github.com/epfml/llm-op...

I have yet to read “Computer Architecture: A Quantitative Approach”

We were cooked the moment operating system UIs stopped shipping looking like this

Sheffield researchers doing The Lord’s work. Great study. www.nature.com/articles/d41...

Over the weekend I released the next part of Isle #FPGA Computer covering bitmap graphics. projectf.io/isle/bitmap-... I've added more docs and tests, but I'm still finding the right approach to the Isle blog and working on diagrams.

This Friday I successfully defended my PhD 🎉 If you want to watch a recording of the defense there is a recording here vimeo.com/1114208379/89dcd4f302

Then and now, Prof. Cong and students trailblaze new design automation research for mainstream high level synthesis tools and myriad applications. Chuck Thacker made beautiful computers with FPGAs, so this award seems particularly apt. web.mit.edu/6.173/www/cu... www.cl.cam.ac.uk/~swm11/examp...

arxiv 📄 Evaluating Large Language Models for Automatic Register Transfer Logic Generation via High-Level Synthesis http://arxiv.org/abs/2408.02793v1 The ever-growing popularity of large language models (LLMs) has resulted in their increasing adoption for hardware design and verification. Prio...

Zedong Peng, Zeju Li, Mingzhe Gao, Qiang Xu, Chen Zhang, Jieru Zhao: ForgeHLS: A Large-Scale, Open-Source Dataset for High-Level Synthesis https://arxiv.org/abs/2507.03255 https://arxiv.org/pdf/2507.03255 https://arxiv.org/html/2507.03255

Huge congrats to Yann Herklotz (@ymherklotz) for successfully defending his PhD thesis today, all about his proven-in-Coq high-level synthesis tool. And enormous thanks to George Constantinides (@gconstantinides) and Xavier Leroy for their thoughtful and thorough examining.

Here is a short blog post about an #FCCM2021 paper that will be presented next week by @ymherklotz about our work (with Zewei Du and @nadeshr5) on finding bugs in high-level synthesis tools using #fuzzing. https://johnwickerson.wordpress.com/2021/05/07/fuzzing-hls/

Martin Langhammer, George A. Constantinides: Banked Memories for Soft SIMT Processors https://arxiv.org/abs/2503.24132 https://arxiv.org/pdf/2503.24132 https://arxiv.org/html/2503.24132

I can't* fathom why the top picture, and not the bottom picture, is the standard diagram for an autoencoder. The whole idea of an autoencoder is that you complete a round trip and seek cycle consistency—why lay out the network linearly?

"On the Theoretical Limitations of Embedding-based Retrieval" Paper: arxiv.org/abs/2508.21038 Repo: github.com/google-deepm...

Rishov Sarkar, Cong Hao: OmniSim: Simulating Hardware with C Speed and RTL Accuracy for High-Level Synthesis Designs https://arxiv.org/abs/2508.19299 https://arxiv.org/pdf/2508.19299 https://arxiv.org/html/2508.19299

NeuraLUT-Assemble open-sourced! My PhD @martaandronic.bsky.social has been working hard to open-source our SOTA NeuraLUT-Assemble work presented this year at FCCM2025. Extreme low latency inference for FPGA-based machine learning. Try: github.com/MartaAndroni... Read: arxiv.org/abs/2504.00592

Want to see NeuraLUT-Assemble working and learn all about the latest in LUT-based neural networks and how to classify in nanoseconds? On Monday 1st @martaandronic.bsky.social and Olly Cassidy from @imperialeee.bsky.social will be delivering a tutorial at @ethz.ch ! indico.cern.ch/event/149667...

Congratulations @clairexen.bsky.social: #HotChips / IEEE TCMM 2025 Open Source Hardware Contribution Award

[New Blog Post] Compositional Datalog on SQL: Relational Algebra of the Environment #datalog #database #sql www.philipzucker.com/compose_data...

📌 New bookmark! What’s in an e-graph? | Max Bernstein This post follows from several conversations with CF Bolz-Tereick, Philip Zucker, Chris Fallin, and Max Willsey. https://bernsteinbear.com/blog/whats-in-an-egraph/

Our work on Detecting Suspense in Stories will appear at COLM'25 arxiv.org/abs/2508.15794 Do LLMs know when stories are suspenseful? We ran LLMs through a bunch of classical psychology suspense studies The answer: kinda, sorta? Honestly, better than I expected. But the results are nuanced... 1/

Suspense is also really common in stories: romcom, thriller, horror, sci-fi, etc. If we ever want really good AI writing assistants, we need to understand their limitations. Also, we know that LLMs are particularly bad at GENERATING suspenseful stories arxiv.org/abs/2402.17119 without help. 7/

In this paper is presented RIROS, a parallel RTL fault simulation framework which integrates structural-level and fault-level parallelism approaches to minimize bubbles that arise from parallel core load imbalances. arxiv.org/pdf/2508.16376

In our latest guest blog post, Matt Young introduces an Automated Triple Modular Redundancy EDA Flow for Yosys! blog.yosyshq.com/p/tamara-tow...

one thing that I don't get about the new push for RL envs for AI agents is, I feel like there was a lot of genuine joy around RL envs for atari, games, starcraft, overcooked* etc I'm not sure who out there is hankering to create RL envs for accounting, excel, IB monkey (said affectionately)

I love how all high-level synthesis tools are not only cursed, but also cursed in their own quirky and unique way

Fun breakdown of the process of implementing a toy TPU in Verilog, starting "from scratch" www.tinytpu.com

I love this post by Todd Austin equating running a kitchen to a modern out of order microprocessor, especially with the inclusion of precise interrupts, prefetch, and power gating.

The Stewart's Calculus movie was 4,000 hours long but it's okay because nobody ever gets to the final third anyway. COMIC ◆ www.smbc-comics.com/comic/flux PATREON ◆ www.patreon.com/c/ZachWeiner... STORE ◆ smbc-store.myshopify.com

Hong Kong University updated AI-Researcher: Agentic Scientific Discovery with a new technical report. GitHub: github.com/HKUDS/AI-Res... Paper: arxiv.org/abs/2505.18705

Paper: arxiv.org/abs/2508.15260 Project: jiaweizzhao.github.io/deepconf

Many of you already heard about this new algo that's faster than Dijkstra ( arxiv.org/abs/2504.17033 ), here I collected 3 software implementations: 1. #python github.com/sidharthpuna... 2. #rust github.com/alphastrata/... 3. #rust + some explanations of the paper medium.com/%40adnanmaso...

David Heineman, Valentin Hofmann, Ian Magnusson, Yuling Gu, Noah A. Smith, Hannaneh Hajishirzi, Kyle Lo, Jesse Dodge Signal and Noise: A Framework for Reducing Uncertainty in Language Model Evaluation https://arxiv.org/abs/2508.13144

[New Blog Post] A Python CLI for Verifying Assembly #formalmethods #assembly #compilers www.philipzucker.com/asm_verify3/

Approximately 30% of answers in the so-called “Humanity’s Last Exam” could be wrong www.futurehouse.org/research-ann...