3 days left for our ChipFoundry sponsored TTSKY25b shuttle! We still have 36 early bird dev kits available, so you can tapeout and receive a copy of the ASIC for just €185! Plenty of interesting projects already submitted: app.tinytapeout.com/shuttles/tts...

New promo vid for the Zero to ASIC digital course just dropped! www.youtube.com/watch?v=GjEn...

Place and Route is the #ASIC terminology of the week! In the last month, Place and Route has been the 13th most popular out of 42 terms.

"You know the interesting thing with semiconductors is there's so much to know that not everyone knows everything... This is actually some really good motivation... to not be afraid of not knowing" A great insight from Nanik Adnani in my latest interview: www.youtube.com/watch?v=hVej...

You have just 10 days left to get your #ASIC design submitted to our TTSKY25b shuttle! There are still 70 early bird dev kits left, which mean you can do a full custom tapeout for just €185! Get started here: tinytapeout.com

Ever wanted to try adding formal verification to your project but it seemed too hard or expensive to get started? In this video @mattvenn.net Venn shows you an easy way to get up and running with our open source tools and GitHub actions! youtu.be/Tn5wCOhzfvs #Verification #Formal #OpenSource

Photolithography is the #ASIC terminology of the week! In the last month, Photolithography has been the 24th most popular out of 42 terms.

PEX is the #ASIC terminology of the week! In the last month, PEX has been the 36th most popular out of 42 terms.

PDN is the #ASIC terminology of the week! In the last month, PDN has been the 40th most popular out of 42 terms.

hackaday.com/2025/10/07/m... @davemurrayrust.bsky.social

The Entire Process of Building an Open Source Analog ASIC

Today is a day when arts degrees are worthless, but the product of those degrees is so valuable it would kill an entire industry if they were made to pay for it.

Happy “Cal Professor gets a Nobel Prize” Day. The second in a week. We're gonna have to build a bigger on-campus reserved parking lot for our Nobel Laureates. Also 🧵 "Six of nine Nobel Laureates so far this year have been American based, half of whom immigrated to the US."

My coffee table book, Open Circuits, with beautiful cross-section photos of electronics, is 25% off through the 12th. Use the super-secret discount code "SHOWOFF". What, you already have the book? BAM--you just thought of a friend who would enjoy a copy. nostarch.com/open-circuits

Going live in about 90 minutes!

Who won our #RISCV peripheral competition? Don't miss the live announcement tomorrow at 19:00 CEST! www.youtube.com/watch?v=dbEW...

PDK is the #ASIC terminology of the week! In the last month, PDK has been the 1st most popular out of 42 terms.

Loving 'bee speaker' by @aptshadow.bsky.social , reminds me how much I enjoyed the first 2 books. Looking forward to rereading them after this!

Announcing the RISC-V competition winners on a livestream, Wednesday 8th! www.youtube.com/watch?v=dbEW... #RISCV #TinyTapeout

Leo Moser and myself will be on @crowdsupply.bsky.social 's Teardown Session talking with @helenleigh.bsky.social about @wafer.space this Thursday (3rd October) - youtu.be/tEOmnN8IAjs

We just packed 237 of your projects into our most packed ASIC to date and submitted it for manufacture. Let’s take a look inside…

We are hiring! Both technical and admin, please take a look at our jobs page! www.yosyshq.com/jobs #jobs #hire

Padring is the #ASIC terminology of the week! In the last month, Padring has been the 9th most popular out of 42 terms.

Teaching processor design at Telecom Nancy Lesson 1: build your own risc-V processor at home using a FPGA Course notes are here: github.com/BrunoLevy/le...

Our next #YUG will be with Matt Young, talking about triple modular redundancy. Join us at 18:00 CET / 22:30 IST / 09:00 PT on Thursday 9th October. Sign up to our mailing list to get a reminder before the event: blog.yosyshq.com/newsletter/

What happens when one of the main providers that enables #opensource #silicon to thrive...shuts down? Companies like @mith.ro's new wafer.space jump in and offer an even more compelling option. $7K for 1000 chips on the GlobalFoundries GF180MCU process. Learn more: theamphour.com/703-building...

Node is the #ASIC terminology of the week! In the last month, Node has been the 12th most popular out of 42 terms.

If you have an extra $10 a month to spare, here's a list of worker-owned cooperative news sites you might want to support: • 404 Media • Defector • The Flytrap • Flaming Hydra • The Appeal • Aftermath • Racket • Hell Gate • The 51st • The Colorado Sun • Range Media • Discourse Blog • Pop Heist

Our chips look the best, no competition!

Check out the fantastic open source hardware hacker content from this weekend’s ORCONF’25! fossi-foundation.org/orconf/2025?... HT/thanks @mattvenn.net

I'll send an ASIC hat to the first person who guesses what this is! #ASIC #opensource #silicon

Verification is the #ASIC terminology of the week! In the last month, Verification has been the 21st most popular out of 42 terms.

Curious about our upcoming KeebDeck products (www.keebdeck.com)? Find us at KiCon in Bochum, Germany later this week, we’ll be showing off those boards and more!

finally (after literally everyone else *) I got my print copy of The Secret Rules of the Terminal! wizardzines.com/zines/termin... (* or I hope after literally everyone else, please send us a support email if you didn't get your preordered copy yet!)

Celebrated Navajo (Diné) artist Marilou Schultz recently completed a striking weaving. Although this rug may appear abstract, it is a representation of the wiring inside an integrated circuit. It shows the 555 timer, said at one point to be the world's most popular IC. Let's take a closer look...

Being able to draw a structure, and then have it do maths, is so cool. My first foray into building logic at the lowest level - I've made a 16-bit counter. The green highlighted cell is my very own half adder, which is repeated 16 times going off the top of the image.

They used my papers so if you have those you should check.

#yeastmasters? Sourdough with 15% rye

Low power math within few clock cycles. Imagine it, then put it into silicon. Made by Vicharak aka @aksharvastarpara.bsky.social 's team and two FPGA freaks. Check - t.co/vBGGA2i0uX Thanks @mattvenn.net and @urishaked.bsky.social and whole @tinytapeout.com team for making this possible.

13 days left to go - what will *you* make? This shuttle has the highest utilisation we’ve seen at this stage before tapeout! #TinyTapeout #ASIC #opensource Get involved here: tinytapeout.com

@chrisgammell.bsky.social loved the recent interview on the amp hour!

Another banger from branch education!

Congratulations @clairexen.bsky.social: #HotChips / IEEE TCMM 2025 Open Source Hardware Contribution Award

In our latest guest blog post, Matt Young introduces an Automated Triple Modular Redundancy EDA Flow for Yosys! blog.yosyshq.com/p/tamara-tow...

Today is the two year anniversary of 404 Media, which is hard to fathom. We wrote about how it's going, what we've done, what we're going to do, and what we've learned. We cannot do this without the support of our subscribers and for that we are endlessly thankful: www.404media.co/two-years-40...

At #COSCUP25, @mattvenn.net shared what makes Tiny Tapeout successful, spotlighted some of the most creative projects, and revealed exciting updates (including our work with GlobalFoundries). www.youtube.com/watch?v=BVMj...

Repost if you support trans people and think we're neato

or get a TT board and learn fpga and design asic as well. bsky.app/profile/roha...

If you want to learn #fpga , I can highly recommend anything by @willflux.bsky.social