No #FPGA data sheets for you today! Lattice reminding us of the good old days of the Internet.

Happy #FPGAFriday. I'm starting work on the next part of 🏝️Isle #FPGA Computer. I'm looking at input and the early system library. UTF-8 is surprisingly easy to decode in assembler; that's not some sort of humble brag, it's a testament to the design of UTF-8.

It’s interesting that early microprocessors, such as the 6502 and Z80 have interrupts, but many open-source #RISCV designs do not. 🤔 Not having interrupts makes practical computer design both simpler and more complex. 🏝️ Isle #FPGA computer doesn’t yet have interrupts, and it’s testing my ingenuity.

The arithmetic/logic unit (ALU) in the Intel 8086 processor (1978) is more complicated than you might expect, performing 28 different operations from addition and logical AND to shifts and BCD adjustment. A special control circuit reconfigures the ALU for each operation. Let's look closer...

Definitely worth 40 minutes of your time if you're into embedded OS, RISC-V, Rust, or FPGA. MMUs are cool (nice to see a shoutout to the 68030) and Xous looks like a fascinating project. #39C3 www.youtube.com/watch?v=BbWW...

I'm happy to release the next installment of 🏝️ Isle #FPGA computer with a #RISCV CPU design from @brunolevy01.bsky.social. This chapter demonstrates how to interface a CPU with your own hardware and how to write bare-metal RISC-V assembly code for it. projectf.io/isle/riscv-c...

Happy 40th Birthday, Macintosh Plus

Who's the saying Hello? The 🏝️ Isle RISC-V CPU. #FPGA Over the weekend I'll be working on the next chapter, introducing a RISC-V CPU, connecting it to our hardware, and writing our first software.

My sister just reminded me of a piece of music I've not heard in a long time. The Lord's Prayer in Swahili as a game theme sounds so unlikely, but... www.youtube.com/watch?v=vsIN...

I've given my 🏝️ Isle #FPGA Computer simulation some love. The most demanding sim is for the Earthrise graphics engine. I now see 43 FPS (+34%) on Apple M1 and 32 FPS (+60%🚀) on Linux with i5-1240P. Verilator + SDL is a potent combo. Give it a go on Mac/Linux/Win: github.com/projf/isle/t...

Why is Verilog so keen to silently widen and truncate signals? With "a & b" (bitwise AND) how often do you actually want the narrower vector zero extended? At least Verilator lint catches this sort of thing. 😔

I was lucky enough to see a kingfisher fishing at Rye Harbour last week.

a dumb idea i had yesterday

I finally got around to reading @mattvenn.net's Excited by silicon! 🚀 Lots of good news in there. I hope Europe considers investing more in open-source silicon. www.zerotoasiccourse.com/post/excited...

Some pre-Christmas tidying on Isle #FPGA Computer: add more tests, upgrade to cocotb 2.0, resolve all Yosys warnings, resolve all pylint warnings, add Arch Linux instructions, better Makefiles... I hope Father Christmas appreciates this. 🎅 github.com/projf/isle

Now text mode is live, I thought I should update my discussion of Isle computer display modes and resolutions projectf.io/isle/display... It's tempting to keep experimenting with new resolution and colour depth combos, but I'm sticking to my current design. 😅

Isle computer hardware text mode is now live. Have a play and let me know how you get on. #FPGA Blog: projectf.io/isle/text-mo... Code: github.com/projf/isle

“Computer graphics provide ways of simulating reality, or building fantastic new worlds, and the power to explore and manipulate those 3D worlds.” Painting By Numbers, BBC Horizon 1981: www.youtube.com/watch?v=W8-5...

I've accidentally started reading about flood fill algorithms. Span filling looks doable in a reasonable amount of logic and memory (for non-pathological shapes). I'm almost tempted to give it a go in #Verilog over Christmas.🎄

“You know you want to do more with Artificial Intelligence. Two problems have held you back: the expense of the hardware and the scarcity of #LISP programmers.” 512K memory required. (Ad from Byte magazine, Jan 1985)

The last month of my life: BreakingTTAPs This is a custom transport-triggered, 32 bit processor that will be fabricated by GlobalFoundries on their 180nm process (via of wafer.space) I'll make a video at some point, but some high level details here:

anybody doing Advent of FPGA in Amaranth? blog.janestreet.com/advent-of-fp... it seems fun, and, moreover, if you have feedback as a learner I will be more than happy to use it to improve the language

I realised my weird Verilog text mode rendering issues were caused by swapping to a memory module with an output reg. Premature optimisation and off-by-one error! 😅 🏝️Isle #FPGA computer text mode supports Unicode with 16 foreground and background colours using GNU Unifont.

Eurythmics music video graphics from 1985 🔥 youtube.com/watch?v=gf_O...

It's Friday afternoon, the weather is lousy, you're still working… must be time for #Ceefax music. 👌 www.youtube.com/watch?v=Oc1m...

Yesterday, I discovered a 959416035780 byte log file on a client server. Enough to write a post about every year the Universe has existed.

If you're writing assembler, I heartily recommend Compiler Explorer. I wrote about this from a RISC-V perspective a while back. #asm #riscv projectf.io/posts/riscv-...

I finally got around to doing another Surfer release, so now we're on v0.4.0 🎉 My personal highlights are the new web assembly based translator system, and the improvements to our waveform control protocol, and you can read the full change log at gitlab.com/surfer-proje...

🏝️ Isle #FPGA Computer now has a Verilog 2D graphics engine. Blog: projectf.io/isle/2d-draw... Code: github.com/projf/isle

"Business at the Scottish Parliament has been suspended because of technical issues with the parliament's online voting system. A senior Scottish Parliament source told BBC News they believe the problems are related to the Microsoft outage." Source: www.bbc.co.uk/news/article...

Stormy weather brings mixed emotions. 🌊⛈️ “Cyclonic becoming westerly or northwesterly, 6 to gale 8, occasionally severe gale 9 at first in east. Moderate or rough, increasing very rough for a time. Showers, then rain later, perhaps thundery. Good, becoming moderate or poor later.“

I realise I've been a little quiet on the 🏝️ Isle #FPGA computer over the last month, but I've been beavering🦫 away on the 2D drawing engine, including 8 new Verilog modules, docs, tests, and a blog post. You can see a screenshot from the draft blog post below. More news soon…

I love to hear about interesting accounts to follow for #FPGA, #riscv, #oshw, and #permacomputing. 💛

I meant to type the word "hardware"; I typed the word "garden" instead. It would be nice to think this reflected a deeper truth, but it's probably my mind telling me to stop looking at Verilog. 🤔

I've been upgrading servers to Debian 13. "The overall disk usage for trixie is 403,854,660 kB (403 GB), and is made up of 1,463,291,186 lines of code." 1.5 billion lines of code. 🤔

Happy #FPGAFriday. The hardware for the next installment of 🏝️ Isle #FPGA Computer is ready; now I'm working on docs, a new blog post, and an update for my sponsors. I'm aiming for a public update next Friday. [1/2]

I don't use Google search, but thought I would test its AI Overview. I'm a convert! 😉🍪

Serendipity brought us to Time Circus in Turnhout. “Feel free to look into and open everything”

Over the weekend I released the next part of Isle #FPGA Computer covering bitmap graphics. projectf.io/isle/bitmap-... I've added more docs and tests, but I'm still finding the right approach to the Isle blog and working on diagrams.

Congratulations @clairexen.bsky.social: #HotChips / IEEE TCMM 2025 Open Source Hardware Contribution Award

Party Fears Two

Some friendly advice from Microsoft on the use of AI in Excel. “Avoid using COPILOT for: Numerical calculations…” support.microsoft.com/en-us/office...

No FPGA for me today 😢, so I'd appreciate hearing about your hardware projects. #FPGAFriday

Isle 🏝️ is my new #FPGA project. Isle is a simple, modern computer — an open design that encourages tinkering, experimentation, and doing your own thing. I hope to inspire you to come on a journey with me and build your own computer. projectf.io/isle/fpga-co...

I'm getting to grips with more cocotb tests for Isle #FPGA computer. This new test verifies pixel output end-to-end: address_calc > vram > clut > display. We're not letting any latency issues sneak in. Will be part of chapter 2: bitmaps.

For some time @securelyfitz.bsky.social and I have been working on a new hardware security tool. A tiny m.2 WiFi module sized FPGA board allowing the access to the PCIe interface. You can sign up for updates for when the campaign launches, some time next year. #EpicErebus #fpga

I’m sad that smaller laptops seem to be a thing of the past. Where are the 10”-12” laptops for writers, travellers, and techies on the move? I want a proper keyboard for writing on, developing on, and SSH. 🤔

“RISC architecture is going to change everything.” Have you seen my seven-part Guide to #riscv assembler? No ads or crappy popups. projectf.io/posts/riscv-...

Icepi Zero looks like an interesting open-source ECP5 #FPGA dev board. It’s got a decent spec in a small form factor. The only obvious omission is audio out. The big question is, how much will it cost? www.crowdsupply.com/icy-electron...

“No 9000 computer has ever made a mistake or distorted information.”