#AMD has released the “ #EPYC 8005 Architecture Overview” – with an unusually large number of fundamental bugs (e.g. 32KB L1D), so I won’t link to it until they fix it. It seems that this documentation is based on the #Zen4 EPYC 8004 Guide and the #Zen5 -update is unfinished.

#Intel #PantherLakeR CPUID E0650: lore.kernel.org/lkml/2026051... GitHub: github.com/InstLatx64/I... github.com/InstLatx64/I...

New #Hygon CPUIDs: -900F31: 32-Core C86 7390, 64 threads, [1] -900F41: C86-4G 7495, Dharma, 4-socket, 4 CDD/socket, #AVX2, [2], [3] -900F50: 2-socket, 8 CDD + 2 IOD), [3] -900F60: Shanghai, 2-socket, sparse DFID (8 CDD + 2 IOD), #AVX2, [2], [3] -900F70: Chengdu, #AVX512, [2] -900F80: [3] 1/2

#Intel refreshed the #AVX10_2 specification to 7.0: cdrdv2-public.intel.com/919693/36105...

#Intel refreshed the "Intel Virtualization Technology for Directed I/O Architecture Specification" pdf to 5.2 cdrdv2-public.intel.com/919688/D5139... #VTIO

#Intel microcode refresh 20260512: github.com/intel/Intel-... #PantherLake CPUID C06C2 C06C3

New #AMD #GorgonPoint CPUID dumps: - 4C+6c #Ryzen AI 9 465 B20F40 - 4C+4c #Ryzen AI 7 450 B60F00 - 1C+3c #Ryzen AI 5 430 B60F80 GitHub: github.com/InstLatx64/I...

New x64 InstLat, CPUID dump, CPUID, C&M, GPGPU panel: #AMD - #PinnacleRidge 800F82: 6C #Ryzen 5 2600X - #Vermeer A20F12: 8C Ryzen 7 5800X #Intel - #HaswellEP 306F2 #Xeon v3: -- 8C E5-2630 -- 18C E5-2696, E5-2699, E5-4669 1/2

This GCC patch reveals some #Hygon CPUIDs, ISA levels, and codenames: github.com/gcc-mirror/g... - 900F40 Dharma #AVX2 - 900F60 Shanghai #AVX2 - 900F70 Chengdu #AVX512

#Intel projects 2026+ v078: - DMR-HD renamed to #TalladegaForest, source [10] refresh - #GrandRidge launched - #NovaLakeAX cancelled, source [49] - source [18] removed GitHub: github.com/InstLatx64/I...

#Intel #GrandRidge CPUID B0660 official SKU list on ark: www.intel.com/content/www/... #Crestmont

This is an important question, and now I finally have some static data: #Intel #APX has the shortest code path, at least in this hand-optimized #SHA3 / #Keccak1600 case

This SPEC pdf mentions two #AMD #Sorano #EPYC 8xx5 SKUs: AMD EPYC 8635P AMD EPYC 8225P www.spec.org/sert2/ISO_Re... 8635P seems the 84-core TOP SKU: www.connection.com/product/hpe-...

New #Intel CPUIDs: - 8P+16E Core 7 251TE #BartlettLake B0674 - 8P+16E Core Ultra 7 270K Plus #ArrowLake refresh C0662 - 4P+4LPE Intel Core Ultra 7 355 #PantherLake C06C3 New #Zhaoxin CPUID: - 8C KaiXian KX-7000 (Shijidadao) 607B1 1/2

Official #Intel #WildCatLake SKU list: www.intel.com/content/www/...

#VisualStudio2026 Insider implements the #AVX512_BMM instructions #AMD #Zen6

#AMD refreshed the "AMD I/O Virtualization Technology (IOMMU) Specification" to 3.11: docs.amd.com/v/u/en-US/48...

#Intel re-released the 91st edition of the Software Developer’s Manuals with minor fixes: cdrdv2-public.intel.com/916575/32546...

#Intel released the 91st edition of the Software Developer’s Manuals with canonized #AMX_COMPLEX. All-in-One: cdrdv2-public.intel.com/916575/32546... Changes v83: cdrdv2-public.intel.com/916574/25204...

#AMD released the 12th #Zen6 pdf "AMD64 Zen6 Platform Quality of Service (PQOS) Extensions" 69193 v1.00: docs.amd.com/v/u/en-US/69... CPUID 80000020h.EBX: b[7] = Global Bandwidth Enforcement (GLBE) b[8] = Global Slow Bandwidth Enforcement (GLSBE) b[9] = Privilege Level Zero Association (PLZA)

My quick note about #Intel #BartlettLake CPUID D0670 and #RaptorLake CPUID B0671 #RaptorCove instruction level differences

New #Intel dumps: -- 12P+0E #Intel Core 9 273PQE #BartlettLake D0670 GitHub: github.com/InstLatx64/I... github.com/InstLatx64/I...

#AMD released the 11th #Zen6 pdf "AMD64 Enhanced SMT Protection" 69204 v1.00: docs.amd.com/v/u/en-US/69... CPUID Fn8000_00025_EDX[1] = EnhSmtProtection

#Intel released the SDE 10.8 (Software Development Emulator): www.intel.com/content/www/... #NovaLake #DiamondRapids #APX #AVX10_2

#Intel refreshed the "Intel XMP 3.0 Memory for Intel Core™ Processors Datasheet" xls with #ArrowLake Plus: www.intel.com/content/www/...

#Intel released the 61st edition of the ISA Extensions Reference with PerfMon Masking and clarifications. Download: cdrdv2-public.intel.com/915637/31943... #DiamondRapids #NovaLake #WildcatLake #PantherCove #CoyoteCove #ArcticWolf CPUID.07h.01.EDX[22]= #SEC_TEE_ATTESTATION

#AMD #Medusa ( #Zen6 mobile) CPUID is B80F00 [1] GitHub: github.com/InstLatx64/I... [1]: browser.geekbench.com/v6/cpu/17130...

Sandpile.org refreshed their CPUID page - it is a goldmine, e.g. the abandoned #AVX512 levels, MIC projects, etc.: www.sandpile.org/x86/cpuid.htm #AVX512QVNNI #AVX512DFMA #AVX512BITALG2 #KnightsBridge #KnightsPeak #KnightsCorner

According to this entry, #AMD #SP8 is LGA5572: www.findchips.com/search/90446

#AMD refreshed the "Processor Programming Reference (PPR) for AMD Family 1Ah Model 02h, Revision C1 Processors" to v0.49 57238 pdf (#Zen5 CPUID B00F2x) with socket #SP6 and #TR5 infos: docs.amd.com/v/u/en-US/57... According to this, #EPYC8005 #Sorano is based on classic CCD, CPUID B00F2x

#AMD released the "Secure VM Service Module for SEV-SNP Guests" 58019 v1.01 pdf: docs.amd.com/v/u/en-US/58...

#Intel Core 7 330 2P+4LPE #WildCatLake CPUID D0651 among BapCo results: results.bapco.com/fdr/94652

#AMD released the 10th #Zen6 pdf "AMD64 Page Modification Logging" 69208 v1.00: docs.amd.com/v/u/en-US/69... CPUID Fn8000_0000A_ECX[4] = Page Modification Logging

#AMD released the 9th #Zen6 pdf "AMD64 Upper Address Ignore Version 2" 69207 v1.00: docs.amd.com/v/u/en-US/69... Fn8000_00021_EAX[26] = UpperAddressIgnoreV2

#AMD released the 8th #Zen6 pdf "AMD64 Zen6 Instruction Based Sampling (IBS) Extensions and Features" 69205 v1.00: docs.amd.com/v/u/en-US/69...

#AMD refreshed the "AMD64 Architecture Programmer's Manual, Volumes 1-5" 40332 to 4.09, all-in-one: Vol1 24592-Rev. 3.24-Aug 2025 Vol2 24593-Rev. 3.44-Mar 2026 Vol3 24594-Rev. 3.37-Jul 2025 Vol4 26568-Rev. 3.26-Jan 2026 Vol5 26569-Rev. 3.16-Nov 2021 docs.amd.com/v/u/en-US/40...

My quick note about #Intel #ArrowLake CPUID C0662 #LionCove and #PantherLake CPUID C06C3 #CougarCove instruction level differences I hope this is because all resources were directed towards developing #CoyoteCove / #PantherCove in #NovaLake and #Diamondrapids.

My quick note about #Intel #ArrowLake CPUID C0662 #Skymont and #PantherLake CPUID C06C3 #Darkmont instruction level differences

#AMD refreshed the "AMD64 Architecture Programmer's Manual, Volumes 2" 24593 pdf to v3.44 docs.amd.com/v/u/en-US/24...

#AMD has updated the "Seamless Firmware Maintenance (SFS) Specification" pdf 58604 to v0.76: docs.amd.com/v/u/en-US/58...

New #Intel #TDX docs: Intel TDX Module Extension for Quoting cdrdv2.intel.com/v1/dl/getCon...

What CCD is used in #AMD #Sorano #EPYC8005? 84 cores is quite a strange number, 12*7? www.amd.com/en/blogs/202...

#AMD released the "CPU Timing and Power Side Channel Guidance" pdf 71030 v1.1: docs.amd.com/v/u/en-US/71...

#AMD released the 7th #Zen6 pdf "Guest PMC Event Filtering" 69202 v1.00: docs.amd.com/v/u/en-US/69... CPUID Fn8000_000A_ECX[GuestPmcFiltering], bit 3 #Virtualization

#Intel refreshed the #AVX10_2 specification to 6.0: cdrdv2-public.intel.com/913918/36105... #AVX10_VNNI_INT renamed to #AVX10_V1_AUX

#Intel refreshed the Advanced Performance Extensions (#Intel #APX) Architecture Specification to 8.0: cdrdv2-public.intel.com/913917/35582...

#AMD released the 6th #Zen6 pdf "CPPC Performance Priority" 69206 v1.00: docs.amd.com/v/u/en-US/69... #CPPC

#Intel released the SDE 10.7 (Software Development Emulator) with Indirect Branch History Fence ( #IBHF) instruction support and refreshed CPUID dumps: www.intel.com/content/www/... #NovaLake #DiamondRapids #APX #AVX10_2

#AMD released the 5th #Zen6 pdf "RMPOPT" 69203 v1.00: docs.amd.com/v/u/en-US/69... #RMPOPT #Virtualization

#AMD released the 4th #Zen6 pdf "RMP Dirty" 69203 v1.00: docs.amd.com/v/u/en-US/69... #RMPCHKD #Virtualization