Greg
@gregdavill.bsky.social
๐ค 871
๐ฅ 239
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ASIC/FPGA/PCB/FW engineer at ASTC ๐งโโ๏ธ (He/Him) I also take macro photos of electronics
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Hi ๐ I'm Greg, hardware engineer. I enjoy designing and building open source hardware projects. along with taking macro photos to document the process. Previously at a startup I used FPGAs and thermal LWIR cameras to map bushfires from aircraft Currently doing RISC-V ASIC things at IQonIC Works
10 months ago
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I'd forgotten that the ECP5-25F doesn't have all the I/O, and 4 or so pins that are on the 45/85F are N/C on the 25F. I just happened to use one of these for the ULPI interface. ๐ฅฒ Bodge wire to the rescue! Now we're enumerating again! USB boot loader in gateware, takes up ~15% of the device
27 days ago
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Tombstone time
28 days ago
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These two boards have the same BGA geometry defined in their gerbers. For some reason JLCs DFM adjustments have expanded all the "via in pad" connections. Makes for an interesting visual effect.
28 days ago
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How's my solder paste application? I think I missed some spots. ๐ซฃ
28 days ago
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FPGAs programming FPGAs ๐ข
about 1 month ago
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Plan vs. Execution The messier the plan the cleaner the bodge looks in comparison. ๐
about 1 month ago
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Can't recall where this came from, but ended up in my labs cable drawer. Curious why it wouldn't enumerate.. ๐คฎ
about 2 months ago
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I've been using KiCad 9's new table features to aid in schematic documentation. I guess it makes sense.. But still puzzled me for a moment that you can perform a vertical/horizontal mirror on a single cell. ๐
loading . . .
4 months ago
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Whoops, it's quick and easy to simply base 3d geometry off a KiCad board outline. But the topology has caught up to me. ๐ซ
5 months ago
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Designed this board years ago, and finally ordered it. The pattern looks really cool on the physical boards.
github.com/gregdavill/a...
5 months ago
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Circuit boards โ๏ธ
5 months ago
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Had an idea, and I nerd-sniped myself into building it... Similar idea to the last ecpbreaker design, but adding the 5Gbps SERDES to enable USB3. The ECP5's serdes supports display-port, so you could probably do some cool alt-mode stuff, but currently only routed for SS USB.
5 months ago
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Spun up a new design to add an ESP32-C3 module to the back of the flip-dot module, along with DC power input. Got a little carried away in inkscape for the silkscreen. Trying out
github.com/30350n/pcb2b...
, a plugin that is in the KiCad PCM for exporting textures directly into blender, works great
5 months ago
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Turns out if your riscv code causes an exception before the handler is configured and the core triggers a load access exception, youโll be in a loop that never exits. Apologies for creatingโฆ checks notesโฆ 1.8TB trace logs ๐ตโ๐ซ๐ซข
5 months ago
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When you don't have the exact part... Just place a parallel combination ๐
6 months ago
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When you realise that one method of creating a 32.768kHz crystal is literally just a miniature tuning fork structure. MEMs oscillators do this to, but at another level of miniaturisation. The lid of this one is glass and you can see that it's been laser-trimmed through likely through the window
6 months ago
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JTAG ๐
6 months ago
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One of the joysticks on this PS5 controller had gotten really crunchy. (I think some sand made it into the mechanism scratching it up. Picked up a few new hall-effect based joysticks to fix the controller
6 months ago
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Cool that they leave the back open on this USB-C connectors on the PS5's controller board.
6 months ago
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Sunday solderpaste stencilling
6 months ago
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Importing an image into KiCad isn't a new feature. But it's super handy for reverse engineering a design. ๐ Would be handy if it was a touch easier to calibrate the exact image size I just adjusted scale until parts started lining up, then locked the image.
7 months ago
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Added logging of dishwasher cycle count to home assistant, via an ESPHome based UART bus sniffer. Convenience factor of the top drawer being easier to fill and empty is visible in the data.
7 months ago
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I've had the flipdot bare modules for ages. And designed a few drivers, but definitely over complicated them. This is now just shift registers + h-bridge drivers. Can't get much simplier.
8 months ago
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Spun up a new prototype of my LED controller. This is a minimal ESP32-C3 breakout for running esphome/wled projects. +5-24V input. 4x Mosfet outputs for dumb LEDs Qwicc connector for i2c/aux expansion Extra I/O on test-points available Low cost BOM
8 months ago
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DF13 ใทใชใผใบ (V)
9 months ago
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Solderpaste โจ
9 months ago
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Quadrature ๐
9 months ago
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After having these screens for over 2 years and not using them in a project I decided to refresh my mipi-dsi code in Amaranth. Got some pixels! It's not perfect, I think my frame timings or config registers are off slightly, hence the darkening at the edges of the display.
9 months ago
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Displaying junk is better than displaying nothing ๐ This 720x720 panel is setup to accept a 18bit RGB signal, but as the driver IC is used across different panels it required a fair amount of configuration over SPI before it accepts a video input.
9 months ago
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9bit SPI decoding ๐ Nice sanity check that my RTL is doing the right thing.
9 months ago
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New to me, a DSO-X 2004A. An upgrade from my 2 channel model. The extra channels are already coming in handy. I2C decode driving a DAC, and monitoring the risetime of the LDO downstream that the DAC controls. ๐
9 months ago
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"Lets mount the lead-frame upside down to provide direct heatsinking!" "But where would we put the part number?" "Hold my beer"
10 months ago
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Got a new power supply to replace the stock DSOX supply, Looks like the original still has some life left, the main DC cap measures ~80uF aged from 100uF. Surprisingly a lot of electronics for a 250W PSU.
10 months ago
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USON 3x2mm QSPI RAM package. On top of a SOIC-8.
10 months ago
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Hot take. ๐ฅ I feel WLCSP are actually easier than similar sized USON/DFNs. ๐
10 months ago
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Picked up a new DSO-X 2000 series 4ch to supplement my 2ch model. 2013 vintage, Taken out the PSU from both to replace. As documented online there is a design issue, which puts these high power dissipating resistors right under the main DC bus capacitor, which accelerates it's ageing.
10 months ago
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I always get CAD goggles and forget how small a 0.15mm trace actually is until I need to cut one 3 layers deep. Luckily I can get away with just a depth controlled hole, not sure my current ebay milling setup would handle pocketing, while maintaining these tolerances.
10 months ago
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This was one of my most popular tweets, I think mostly due to the clear macro photo I took. Footprint was P0.5mm vs 0.65mm. So IC couldn't be soldered down. I was able to bodge existing boards in 1-2hrs. While my friend spent 10min on the redesign (+waiting a week for mfg/ship).
10 months ago
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Do you ever place resistors upside down when hand assembling prototypes? ๐ข
10 months ago
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Sometimes debugging works better with a buddy. Sometimes it does not. ๐
10 months ago
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Hi ๐ I'm Greg, hardware engineer. I enjoy designing and building open source hardware projects. along with taking macro photos to document the process. Previously at a startup I used FPGAs and thermal LWIR cameras to map bushfires from aircraft Currently doing RISC-V ASIC things at IQonIC Works
10 months ago
5
137
12
USB SS. 'ss' reminds engineers that the traces should smoothly snake across the board. ๐
11 months ago
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